Operating at under 7MHz the ARC Sound Subsystem core dissipates 0.46mW when decoding a typical MP3 stream at 128kbit/s per 44.1kHz.
The decoder springs out of the IP firm’s acquisition of Alarity, the multimedia software specialist, and ARC has integrated the IP with its configurable processor technology.
“Developing an MP3 decoder or any other multimedia codec for ARC CPU cores and subsystems is greatly enhanced by inherent configurability,” said Felix Litvinsky, v-p of business development at ARC and former CEO of Alarity.
The configurable processor architecture means that developers can profile code to identify execution bottlenecks and add an instruction to accelerate code performance.
“This frees them to create optimized software on optimized hardware,” said Litvinsky.
At 0.83mm sq. in TSMC 90nm G process, including RAMs, the ARC Sound Subsystem decoder is small enough for handheld audio applications.